Sistemas Digitais

No previous courses are advised.

The teaching of the course is based on classroom exposition and laboratory classes in which will be carried out related experimental work. The assessment is done by weighting the scores for a final exam, as well as those resulting from the implementation and reporting of laboratory work.

Provide the theoretical and practical aspects of the analysis and synthesis of digital systems (combinational and sequential). To provide an introduction to digital systems design using computational tools to specification with hardware description languages, simulation and synthesis. Skills: To know, understand, and apply learning to use sizing systems. To know and understand the principles of Digital Systems. Understanding and mastering the Boolean Algebra. To know, understand the combinational circuits from the point of view of analysis and synthesis. To know, understand and learn the circuits and sequential state machines in terms of analysis and synthesis. To know, understand and learn to use reconfigurable logic circuits. To know and understand flowcharts and technical design of systems. To know, understand, and apply learning to use sizing systems.

Theoretical elements: Numbering systems; Binary, octal and hexadecimal system, Base conversion, Binary arithmetic; Multiplication and division; Binary coding 2. Introduction to Digital Systems. 3. Boole’s algebra; Logical functions; Truth tables, Simplification; Algebraic manipulation, Karnaugh maps. 4. Combinatory circuits; Doors and logic and logic circuits; Decoders and encoders; Multiplexer and demultiplexer; Comparators; Adders and subtractors. 5. Sequential circuits; Memory elements; Synchronous sequential circuits; Accountants. 6. Sequential circuits and state machines: analysis and synthesis; 7. Reconfigurable logic circuits; FPGAs; Configuration tools. Notion of control and data path. Synchronization of logic circuits. Introduction to microprocessor architecture and assembly language.

Laboratory practice: combinational circuits; Comparators; Multiplexer; Multiplier; Encoders and Decoders; Introduction to the logic circuit synthesis and FPGA tools; Introduction to assembly language and the structure of a general purpose processor.

The assessment consists of:

Laboratory assessment, worth 12 out of 20 points. Theoretical component, worth 8 out of 20 points.

Both components have a minimum passing grade of 40%.

The laboratory component is based on 2 lab tests, a set of weekly assignments, and a final project.

The two tests are graded as follows: 1st test: 2 points; 2nd test: 2 points.

The submission of all lab assignments is worth up to 2 points, depending on the individual evaluation of each assignment.

The final project is worth 6 points. The failure to deliver the final project implies a null evaluation of the laboratorial component.

The final project, as well as the weekly assignments, are evaluated through an individual oral defense.

Failure to attend or complete any of the assessment components will result in a score of zero for that component.

The theoretical component is evaluated through a final exam. The theoretical exam grade may be subject to a complementary oral exam.

The final grade must exceed 9.5 points, and there is a limit of 2 unexcused absences in the laboratory component.

For students who attended or were enrolled in the course unit in previous academic years, assessment is conducted via one of three modalities:

Modality A:

The grade for laboratory components-based on class assignments and tests from previous years-is retained at its current value and counts for 6 points.

Laboratory attendance is waived.

Implementation, submission, and defense of the final project (worth 6 points) are not waived.

Modality B:

For students who never attended the laboratory and/or did not meet the minimum laboratory grade requirements.

Laboratory attendance is not waived, and assessment follows the 2026/2027 criteria.

Modality C:

For students who attended but did not meet the minimum laboratory grade requirements.

Students must complete two projects (due by November 30, worth 6 points) and the final project (worth 6 points); the final project requirement is not waived.

Alternatively, these students may choose Modality B.

The choice between Modality C and Modality B must be communicated to the instructor by September 28. Failure to communicate this choice implies the selection of Modality C.

The list of students by modality, as well as the project specifications, are published on the Moodle platform.

NAO